ROLAND  0.70
Amstrad Emulator based on Caprice Source rewritten in C++.
Macros
macros.h File Reference

Go to the source code of this file.

Macros

#define z80_int_handler
 
#define ADC(value)
 
#define ADD(value)
 
#define ADD16(dest, src)
 
#define AND(val)
 
#define CALL
 
#define CP(value)
 
#define DAA
 
#define DEC(reg)
 
#define JR
 
#define EXX
 
#define EX(op1, op2)
 
#define EX_SP(reg)
 
#define INC(reg)
 
#define JP
 
#define LD16_MEM(reg)
 
#define LDMEM_16(reg)
 
#define OR(val)
 
#define POP(reg)
 
#define PUSH(reg)
 
#define RET
 
#define RLA
 
#define RLCA
 
#define RRA
 
#define RRCA
 
#define RST(addr)
 
#define SBC(value)
 
#define SUB(value)
 
#define XOR(val)
 
#define BIT(bit, reg)   z80.AF.b.l = (z80.AF.b.l & Cflag) | Hflag | SZ_BIT[reg & (1 << bit)]
 
#define BIT_XY   BIT
 
#define ADC16(reg)
 
#define CPD
 
#define CPDR
 
#define CPI
 
#define CPIR
 
#define IND
 
#define INDR
 
#define INI
 
#define INIR
 
#define LDD
 
#define LDDR
 
#define LDI
 
#define LDIR
 
#define NEG
 
#define OUTD
 
#define OTDR
 
#define OUTI
 
#define OTIR
 
#define RLD
 
#define RRD
 
#define SBC16(reg)
 

Macro Definition Documentation

#define ADC (   value)
Value:
{ \
unsigned val = value; \
unsigned res = z80.AF.b.h + val + (z80.AF.b.l & Cflag); \
z80.AF.b.l = SZ[res & 0xff] | ((res >> 8) & Cflag) | ((z80.AF.b.h ^ res ^ val) & Hflag) | \
(((val ^ z80.AF.b.h ^ 0x80) & (val ^ res) & 0x80) >> 5); \
z80.AF.b.h = res; \
}

Referenced by Z80::execute(), Z80::z80_pfx_dd(), and Z80::z80_pfx_fd().

#define ADC16 (   reg)
Value:
{ \
tDWORD res = z80.HL.d + z80.reg.d + (z80.AF.b.l & Cflag); \
z80.AF.b.l = (((z80.HL.d ^ res ^ z80.reg.d) >> 8) & Hflag) | \
((res >> 16) & Cflag) | \
((res >> 8) & (Sflag | Xflags)) | \
((res & 0xffff) ? 0 : Zflag) | \
(((z80.reg.d ^ z80.HL.d ^ 0x8000) & (z80.reg.d ^ res) & 0x8000) >> 13); \
z80.HL.w.l = (tUWORD)res; \
}
uint16_t tUWORD
Definition: types.h:80

Referenced by Z80::z80_pfx_ed().

#define ADD (   value)
Value:
{ \
unsigned val = value; \
unsigned res = z80.AF.b.h + val; \
z80.AF.b.l = SZ[(tUBYTE)res] | ((res >> 8) & Cflag) | ((z80.AF.b.h ^ res ^ val) & Hflag) | \
(((val ^ z80.AF.b.h ^ 0x80) & (val ^ res) & 0x80) >> 5); \
z80.AF.b.h = (tUBYTE)res; \
}
uint8_t tUBYTE
Definition: types.h:74

Referenced by Z80::execute(), Z80::z80_pfx_dd(), and Z80::z80_pfx_fd().

#define ADD16 (   dest,
  src 
)
Value:
{ \
tDWORD res = z80.dest.d + z80.src.d; \
z80.AF.b.l = (z80.AF.b.l & (Sflag | Zflag | Vflag)) | (((z80.dest.d ^ res ^ z80.src.d) >> 8) & Hflag) | \
((res >> 16) & Cflag) | ((res >> 8) & Xflags); \
z80.dest.w.l = (tUWORD)res; \
}
uint16_t tUWORD
Definition: types.h:80

Referenced by Z80::execute(), Z80::z80_pfx_dd(), and Z80::z80_pfx_fd().

#define AND (   val)
Value:
{ \
z80.AF.b.h &= val; \
z80.AF.b.l = SZP[z80.AF.b.h] | Hflag; \
}

Referenced by Z80::execute(), Z80::z80_pfx_dd(), and Z80::z80_pfx_fd().

#define BIT (   bit,
  reg 
)    z80.AF.b.l = (z80.AF.b.l & Cflag) | Hflag | SZ_BIT[reg & (1 << bit)]

Referenced by Z80::z80_pfx_cb().

#define BIT_XY   BIT
#define CALL
Value:
{ \
tREGPAIR dest; \
dest.b.l = read_mem(z80.PC.w.l++); /* subroutine address low byte */ \
dest.b.h = read_mem(z80.PC.w.l++); /* subroutine address high byte */ \
write_mem(--z80.SP.w.l, z80.PC.b.h); /* store high byte of current PC */ \
write_mem(--z80.SP.w.l, z80.PC.b.l); /* store low byte of current PC */ \
z80.PC.w.l = dest.w.l; /* continue execution at subroutine */ \
}

Referenced by Z80::execute(), Z80::z80_pfx_dd(), and Z80::z80_pfx_fd().

#define CP (   value)
Value:
{ \
unsigned val = value; \
unsigned res = z80.AF.b.h - val; \
z80.AF.b.l = (SZ[res & 0xff] & (Sflag | Zflag)) | (val & Xflags) | ((res >> 8) & Cflag) | Nflag | ((z80.AF.b.h ^ res ^ val) & Hflag) | \
((((val ^ z80.AF.b.h) & (z80.AF.b.h ^ res)) >> 5) & Vflag); \
}

Referenced by Z80::execute(), Z80::z80_pfx_dd(), and Z80::z80_pfx_fd().

#define CPD
Value:
{ \
tUBYTE val = read_mem(z80.HL.w.l); \
tUBYTE res = z80.AF.b.h - val; \
z80.HL.w.l--; \
z80.BC.w.l--; \
z80.AF.b.l = (z80.AF.b.l & Cflag) | (SZ[res] & ~Xflags) | ((z80.AF.b.h ^ val ^ res) & Hflag) | Nflag; \
if(z80.AF.b.l & Hflag) res -= 1; \
if(res & 0x02) z80.AF.b.l |= 0x20; \
if(res & 0x08) z80.AF.b.l |= 0x08; \
if(z80.BC.w.l) z80.AF.b.l |= Vflag; \
}
GLuint GLfloat GLenum cap GLsizei GLuint *textures GLenum GLint *params void GLdouble GLdouble GLdouble GLdouble GLdouble GLdouble zFar GLenum GLint GLint GLsizei GLsizei GLint GLenum GLenum const GLvoid *pixels GLenum GLint GLint GLint GLsizei GLsizei GLenum GLenum const GLvoid *pixels GLfloat GLfloat y GLubyte GLubyte GLubyte b
Definition: glfunclist.h:27

Referenced by Z80::z80_pfx_ed().

#define CPDR
Value:
CPD; \
if(z80.BC.w.l && !(z80.AF.b.l & Zflag)) \
{ \
iCycleCount += cc_ex[bOpCode]; \
z80.PC.w.l -= 2; \
iWSAdjust++; \
}
#define CPD
Definition: macros.h:382

Referenced by Z80::z80_pfx_ed().

#define CPI
Value:
{ \
tUBYTE val = read_mem(z80.HL.w.l); \
tUBYTE res = z80.AF.b.h - val; \
z80.HL.w.l++; \
z80.BC.w.l--; \
z80.AF.b.l = (z80.AF.b.l & Cflag) | (SZ[res] & ~Xflags) | ((z80.AF.b.h ^ val ^ res) & Hflag) | Nflag; \
if(z80.AF.b.l & Hflag) res -= 1; \
if(res & 0x02) z80.AF.b.l |= 0x20; \
if(res & 0x08) z80.AF.b.l |= 0x08; \
if(z80.BC.w.l) z80.AF.b.l |= Vflag; \
}
GLuint GLfloat GLenum cap GLsizei GLuint *textures GLenum GLint *params void GLdouble GLdouble GLdouble GLdouble GLdouble GLdouble zFar GLenum GLint GLint GLsizei GLsizei GLint GLenum GLenum const GLvoid *pixels GLenum GLint GLint GLint GLsizei GLsizei GLenum GLenum const GLvoid *pixels GLfloat GLfloat y GLubyte GLubyte GLubyte b
Definition: glfunclist.h:27

Referenced by Z80::z80_pfx_ed().

#define CPIR
Value:
CPI; \
if(z80.BC.w.l && !(z80.AF.b.l & Zflag)) \
{ \
iCycleCount += cc_ex[bOpCode]; \
z80.PC.w.l -= 2; \
iWSAdjust++; \
}
#define CPI
Definition: macros.h:404

Referenced by Z80::z80_pfx_ed().

#define DAA
Value:
{ \
int idx = z80.AF.b.h; \
if(z80.AF.b.l & Cflag) \
idx |= 0x100; \
if(z80.AF.b.l & Hflag) \
idx |= 0x200; \
if(z80.AF.b.l & Nflag) \
idx |= 0x400; \
z80.AF.w.l = DAATable[idx]; \
}

Referenced by Z80::execute(), Z80::z80_pfx_dd(), and Z80::z80_pfx_fd().

#define DEC (   reg)
Value:
{ \
reg--; \
z80.AF.b.l = (z80.AF.b.l & Cflag) | SZHV_dec[reg]; \
}

Referenced by Z80::execute(), Z80::z80_pfx_dd(), and Z80::z80_pfx_fd().

#define EX (   op1,
  op2 
)
Value:
{ \
tREGPAIR temp; \
temp = op1; \
op1 = op2; \
op2 = temp; \
}

Referenced by Z80::execute(), Z80::z80_pfx_dd(), and Z80::z80_pfx_fd().

#define EX_SP (   reg)
Value:
{ \
tREGPAIR temp; \
temp.b.l = read_mem(z80.SP.w.l++); \
temp.b.h = read_mem(z80.SP.w.l); \
write_mem(z80.SP.w.l--, z80.reg.b.h); \
write_mem(z80.SP.w.l, z80.reg.b.l); \
z80.reg.w.l = temp.w.l; \
}

Referenced by Z80::execute(), Z80::z80_pfx_dd(), and Z80::z80_pfx_fd().

#define EXX
Value:
{ \
tREGPAIR temp; \
temp = z80.BCx; \
z80.BCx = z80.BC; \
z80.BC = temp; \
temp = z80.DEx; \
z80.DEx = z80.DE; \
z80.DE = temp; \
temp = z80.HLx; \
z80.HLx = z80.HL; \
z80.HL = temp; \
}

Referenced by Z80::execute(), Z80::z80_pfx_dd(), and Z80::z80_pfx_fd().

#define INC (   reg)
Value:
{ \
reg++; \
z80.AF.b.l = (z80.AF.b.l & Cflag) | SZHV_inc[reg]; \
}

Referenced by Z80::execute(), Z80::z80_pfx_dd(), and Z80::z80_pfx_fd().

#define IND
Value:
{ \
tUBYTE io = z80_IN_handler(z80.BC); \
z80.BC.b.h--; \
write_mem(z80.HL.w.l, io); \
z80.HL.w.l--; \
z80.AF.b.l = SZ[z80.BC.b.h]; \
if(io & Sflag) z80.AF.b.l |= Nflag; \
if((((z80.BC.b.l - 1) & 0xff) + io) & 0x100) z80.AF.b.l |= Hflag | Cflag; \
if((drep_tmp1[z80.BC.b.l & 3][io & 3] ^ breg_tmp2[z80.BC.b.h] ^ (z80.BC.b.l >> 2) ^ (io >> 2)) & 1) \
z80.AF.b.l |= Pflag; \
}
#define z80_IN_handler
Definition: z80.h:36

Referenced by Z80::z80_pfx_ed().

#define INDR
Value:
IND; \
if(z80.BC.b.h) \
{ \
iCycleCount += cc_ex[bOpCode]; \
z80.PC.w.l -= 2; \
}
#define IND
Definition: macros.h:426

Referenced by Z80::z80_pfx_ed().

#define INI
Value:
{ \
tUBYTE io = z80_IN_handler(z80.BC); \
z80.BC.b.h--; \
write_mem(z80.HL.w.l, io); \
z80.HL.w.l++; \
z80.AF.b.l = SZ[z80.BC.b.h]; \
if(io & Sflag) z80.AF.b.l |= Nflag; \
if((((z80.BC.b.l + 1) & 0xff) + io) & 0x100) z80.AF.b.l |= Hflag | Cflag; \
if((irep_tmp1[z80.BC.b.l & 3][io & 3] ^ breg_tmp2[z80.BC.b.h] ^ (z80.BC.b.l >> 2) ^ (io >> 2)) & 1) \
z80.AF.b.l |= Pflag; \
}
#define z80_IN_handler
Definition: z80.h:36

Referenced by Z80::z80_pfx_ed().

#define INIR
Value:
INI; \
if(z80.BC.b.h) \
{ \
iCycleCount += cc_ex[bOpCode]; \
z80.PC.w.l -= 2; \
}
#define INI
Definition: macros.h:447

Referenced by Z80::z80_pfx_ed().

#define JP
Value:
{ \
tREGPAIR addr; \
addr.b.l = read_mem(z80.PC.w.l++); \
addr.b.h = read_mem(z80.PC.w.l); \
z80.PC.w.l = addr.w.l; \
}

Referenced by Z80::execute(), Z80::z80_pfx_dd(), and Z80::z80_pfx_fd().

#define JR
Value:
{ \
signed char offset; \
offset = (signed char)(read_mem(z80.PC.w.l)); /* grab signed jump offset */ \
z80.PC.w.l += offset + 1; /* add offset & correct PC */ \
}

Referenced by Z80::execute(), Z80::z80_pfx_dd(), and Z80::z80_pfx_fd().

#define LD16_MEM (   reg)
Value:
{ \
tREGPAIR addr; \
addr.b.l = read_mem(z80.PC.w.l++); \
addr.b.h = read_mem(z80.PC.w.l++); \
z80.reg.b.l = read_mem(addr.w.l); \
z80.reg.b.h = read_mem(addr.w.l+1); \
}

Referenced by Z80::execute(), Z80::z80_pfx_dd(), Z80::z80_pfx_ed(), and Z80::z80_pfx_fd().

#define LDD
Value:
{ \
tUBYTE io = read_mem(z80.HL.w.l); \
write_mem(z80.DE.w.l, io); \
z80.AF.b.l &= Sflag | Zflag | Cflag; \
if((z80.AF.b.h + io) & 0x02) z80.AF.b.l |= 0x20; \
if((z80.AF.b.h + io) & 0x08) z80.AF.b.l |= 0x08; \
z80.HL.w.l--; \
z80.DE.w.l--; \
z80.BC.w.l--; \
if(z80.BC.w.l) z80.AF.b.l |= Vflag; \
}
GLuint GLfloat GLenum cap GLsizei GLuint *textures GLenum GLint *params void GLdouble GLdouble GLdouble GLdouble GLdouble GLdouble zFar GLenum GLint GLint GLsizei GLsizei GLint GLenum GLenum const GLvoid *pixels GLenum GLint GLint GLint GLsizei GLsizei GLenum GLenum const GLvoid *pixels GLfloat GLfloat y GLubyte GLubyte GLubyte b
Definition: glfunclist.h:27

Referenced by Z80::z80_pfx_ed().

#define LDDR
Value:
LDD; \
if(z80.BC.w.l) \
{ \
iCycleCount += cc_ex[bOpCode]; \
z80.PC.w.l -= 2; \
}
#define LDD
Definition: macros.h:468

Referenced by Z80::z80_pfx_ed().

#define LDI
Value:
{ \
tUBYTE io = read_mem(z80.HL.w.l); \
write_mem(z80.DE.w.l, io); \
z80.AF.b.l &= Sflag | Zflag | Cflag; \
if((z80.AF.b.h + io) & 0x02) z80.AF.b.l |= 0x20; \
if((z80.AF.b.h + io) & 0x08) z80.AF.b.l |= 0x08; \
z80.HL.w.l++; \
z80.DE.w.l++; \
z80.BC.w.l--; \
if(z80.BC.w.l) z80.AF.b.l |= Vflag; \
}
GLuint GLfloat GLenum cap GLsizei GLuint *textures GLenum GLint *params void GLdouble GLdouble GLdouble GLdouble GLdouble GLdouble zFar GLenum GLint GLint GLsizei GLsizei GLint GLenum GLenum const GLvoid *pixels GLenum GLint GLint GLint GLsizei GLsizei GLenum GLenum const GLvoid *pixels GLfloat GLfloat y GLubyte GLubyte GLubyte b
Definition: glfunclist.h:27

Referenced by Z80::z80_pfx_ed().

#define LDIR
Value:
LDI; \
if(z80.BC.w.l) \
{ \
iCycleCount += cc_ex[bOpCode]; \
z80.PC.w.l -= 2; \
}
#define LDI
Definition: macros.h:489

Referenced by Z80::z80_pfx_ed().

#define LDMEM_16 (   reg)
Value:
{ \
tREGPAIR addr; \
addr.b.l = read_mem(z80.PC.w.l++); \
addr.b.h = read_mem(z80.PC.w.l++); \
write_mem(addr.w.l, z80.reg.b.l); \
write_mem(addr.w.l+1, z80.reg.b.h); \
}

Referenced by Z80::execute(), Z80::z80_pfx_dd(), Z80::z80_pfx_ed(), and Z80::z80_pfx_fd().

#define NEG
Value:
{ \
tUBYTE value = z80.AF.b.h; \
z80.AF.b.h = 0; \
SUB(value); \
}

Referenced by Z80::z80_pfx_ed().

#define OR (   val)
Value:
{ \
z80.AF.b.h |= val; \
z80.AF.b.l = SZP[z80.AF.b.h]; \
}

Referenced by Z80::execute(), Z80::z80_pfx_dd(), and Z80::z80_pfx_fd().

#define OTDR
Value:
OUTD; \
if(z80.BC.b.h) \
{ \
iCycleCount += cc_ex[bOpCode]; \
z80.PC.w.l -= 2; \
}
#define OUTD
Definition: macros.h:517

Referenced by Z80::z80_pfx_ed().

#define OTIR
Value:
OUTI; \
if(z80.BC.b.h) \
{ \
iCycleCount += cc_ex[bOpCode]; \
z80.PC.w.l -= 2; \
}
#define OUTI
Definition: macros.h:538

Referenced by Z80::z80_pfx_ed().

#define OUTD
Value:
{ \
tUBYTE io = read_mem(z80.HL.w.l); \
z80.BC.b.h--; \
z80_OUT_handler(z80.BC, io); \
z80.HL.w.l--; \
z80.AF.b.l = SZ[z80.BC.b.h]; \
if(io & Sflag) z80.AF.b.l |= Nflag; \
if((((z80.BC.b.l - 1) & 0xff) + io) & 0x100) z80.AF.b.l |= Hflag | Cflag; \
if((drep_tmp1[z80.BC.b.l & 3][io & 3] ^ breg_tmp2[z80.BC.b.h] ^ (z80.BC.b.l >> 2) ^ (io >> 2)) & 1) \
z80.AF.b.l |= Pflag; \
}

Referenced by Z80::z80_pfx_ed().

#define OUTI
Value:
{ \
tUBYTE io = read_mem(z80.HL.w.l); \
z80.BC.b.h--; \
z80_OUT_handler(z80.BC, io); \
z80.HL.w.l++; \
z80.AF.b.l = SZ[z80.BC.b.h]; \
if(io & Sflag) z80.AF.b.l |= Nflag; \
if((((z80.BC.b.l + 1) & 0xff) + io) & 0x100) z80.AF.b.l |= Hflag | Cflag; \
if((irep_tmp1[z80.BC.b.l & 3][io & 3] ^ breg_tmp2[z80.BC.b.h] ^ (z80.BC.b.l >> 2) ^ (io >> 2)) & 1) \
z80.AF.b.l |= Pflag; \
}

Referenced by Z80::z80_pfx_ed().

#define POP (   reg)
Value:
{ \
z80.reg.b.l = read_mem(z80.SP.w.l++); \
z80.reg.b.h = read_mem(z80.SP.w.l++); \
}

Referenced by Z80::execute(), Z80::z80_pfx_dd(), and Z80::z80_pfx_fd().

#define PUSH (   reg)
Value:
{ \
write_mem(--z80.SP.w.l, z80.reg.b.h); \
write_mem(--z80.SP.w.l, z80.reg.b.l); \
}

Referenced by Z80::execute(), Z80::z80_pfx_dd(), and Z80::z80_pfx_fd().

#define RET
Value:
{ \
z80.PC.b.l = read_mem(z80.SP.w.l++); \
z80.PC.b.h = read_mem(z80.SP.w.l++); \
}

Referenced by Z80::execute(), Z80::z80_pfx_dd(), Z80::z80_pfx_ed(), and Z80::z80_pfx_fd().

#define RLA
Value:
{ \
tUBYTE res = (z80.AF.b.h << 1) | (z80.AF.b.l & Cflag); \
tUBYTE carry = (z80.AF.b.h & 0x80) ? Cflag : 0; \
z80.AF.b.l = (z80.AF.b.l & (Sflag | Zflag | Pflag)) | carry | (res & Xflags); \
z80.AF.b.h = res; \
}

Referenced by Z80::execute(), Z80::z80_pfx_dd(), and Z80::z80_pfx_fd().

#define RLCA
Value:
{ \
z80.AF.b.h = (z80.AF.b.h << 1) | (z80.AF.b.h >> 7); \
z80.AF.b.l = (z80.AF.b.l & (Sflag | Zflag | Pflag)) | (z80.AF.b.h & (Xflags | Cflag)); \
}

Referenced by Z80::execute(), Z80::z80_pfx_dd(), and Z80::z80_pfx_fd().

#define RLD
Value:
{ \
tUBYTE n = read_mem(z80.HL.w.l); \
write_mem(z80.HL.w.l, (n << 4) | (z80.AF.b.h & 0x0f)); \
z80.AF.b.h = (z80.AF.b.h & 0xf0) | (n >> 4); \
z80.AF.b.l = (z80.AF.b.l & Cflag) | SZP[z80.AF.b.h]; \
}
GLuint GLfloat GLenum cap GLsizei n
Definition: glfunclist.h:13

Referenced by Z80::z80_pfx_ed().

#define RRA
Value:
{ \
tUBYTE res = (z80.AF.b.h >> 1) | (z80.AF.b.l << 7); \
tUBYTE carry = (z80.AF.b.h & 0x01) ? Cflag : 0; \
z80.AF.b.l = (z80.AF.b.l & (Sflag | Zflag | Pflag)) | carry | (res & Xflags); \
z80.AF.b.h = res; \
}

Referenced by Z80::execute(), Z80::z80_pfx_dd(), and Z80::z80_pfx_fd().

#define RRCA
Value:
{ \
z80.AF.b.l = (z80.AF.b.l & (Sflag | Zflag | Pflag)) | (z80.AF.b.h & Cflag); \
z80.AF.b.h = (z80.AF.b.h >> 1) | (z80.AF.b.h << 7); \
z80.AF.b.l |= (z80.AF.b.h & Xflags); \
}

Referenced by Z80::execute(), Z80::z80_pfx_dd(), and Z80::z80_pfx_fd().

#define RRD
Value:
{ \
tUBYTE n = read_mem(z80.HL.w.l); \
write_mem(z80.HL.w.l, (n >> 4) | (z80.AF.b.h << 4)); \
z80.AF.b.h = (z80.AF.b.h & 0xf0) | (n & 0x0f); \
z80.AF.b.l = (z80.AF.b.l & Cflag) | SZP[z80.AF.b.h]; \
}
GLuint GLfloat GLenum cap GLsizei n
Definition: glfunclist.h:13

Referenced by Z80::z80_pfx_ed().

#define RST (   addr)
Value:
{ \
write_mem(--z80.SP.w.l, z80.PC.b.h); /* store high byte of current PC */ \
write_mem(--z80.SP.w.l, z80.PC.b.l); /* store low byte of current PC */ \
z80.PC.w.l = addr; /* continue execution at restart address */ \
}

Referenced by Z80::execute(), Z80::mf2stop(), Z80::z80_pfx_dd(), and Z80::z80_pfx_fd().

#define SBC (   value)
Value:
{ \
unsigned val = value; \
unsigned res = z80.AF.b.h - val - (z80.AF.b.l & Cflag); \
z80.AF.b.l = SZ[res & 0xff] | ((res >> 8) & Cflag) | Nflag | ((z80.AF.b.h ^ res ^ val) & Hflag) | \
(((val ^ z80.AF.b.h) & (z80.AF.b.h ^ res) & 0x80) >> 5); \
z80.AF.b.h = res; \
}

Referenced by Z80::execute(), Z80::z80_pfx_dd(), and Z80::z80_pfx_fd().

#define SBC16 (   reg)
Value:
{ \
tDWORD res = z80.HL.d - z80.reg.d - (z80.AF.b.l & Cflag); \
z80.AF.b.l = (((z80.HL.d ^ res ^ z80.reg.d) >> 8) & Hflag) | Nflag | \
((res >> 16) & Cflag) | \
((res >> 8) & (Sflag | Xflags)) | \
((res & 0xffff) ? 0 : Zflag) | \
(((z80.reg.d ^ z80.HL.d) & (z80.HL.d ^ res) &0x8000) >> 13); \
z80.HL.w.l = (tUWORD)res; \
}
uint16_t tUWORD
Definition: types.h:80

Referenced by Z80::z80_pfx_ed().

#define SUB (   value)
Value:
{ \
unsigned val = value; \
unsigned res = z80.AF.b.h - val; \
z80.AF.b.l = SZ[res & 0xff] | ((res >> 8) & Cflag) | Nflag | ((z80.AF.b.h ^ res ^ val) & Hflag) | \
(((val ^ z80.AF.b.h) & (z80.AF.b.h ^ res) & 0x80) >> 5); \
z80.AF.b.h = res; \
}

Referenced by Z80::execute(), Z80::z80_pfx_dd(), and Z80::z80_pfx_fd().

#define XOR (   val)
Value:
{ \
z80.AF.b.h ^= val; \
z80.AF.b.l = SZP[z80.AF.b.h]; \
}

Referenced by Z80::execute(), Z80::z80_pfx_dd(), and Z80::z80_pfx_fd().

#define z80_int_handler

Referenced by Z80::execute().